Palladium Tips

* To pre-allocate specific domains for a palladium database to run on in a script, we can use xeset command. The following is an example

debug . -session new2
xeset bpValue {0.5 0.6}
host cemulx120
download
...

* Use Verigen to generate gate-level schematics

We can do this via command line or via xeDebug GUI.
a. Use xeDebug GUI
There is a RTL/Gate tab in xeDebug GUI.

In the above, we added the instance of "." and generated verilog file of default.v. The instance of "." represents the root of the design.

b. Directly use command at command line.
verigen USERLIB TEST_WRP -inst . -out default.v -bus

In the above, USERLIB is the library, TEST_WRP is the top level design cell.

* How to debug ribbon cable connection and PIN assignment for palladium database

For example, we know PIN_WE_CE0_CH0 is supposed to connect to the WE pin of Channel 0 CE0 of a NAND daughter card. We can remove NAND from the daughter card to avoid it to drive the signal. Then we can force PIN_WE_CE0_CH0 to low and measure the voltage of the WE input. Then force PIN_WE_CE0_CH0 to high and measure the voltage of the WE input of the daughter card. If the voltage measured matches with the high/low level of the daughter card input, then the PIN assignment/ribbon cable connection for this signal is correct.

Use SDL on Palladium - Trigger when a signal stays for a while

State Description Language(SDL) is a run-time debugging feature on Palladium that can control several aspects of the run such as when to stop, or when to capture probed data(tracing). More details can be referred to Ref[1]

Here is a very quick guide on how to use SDL. 

1. Support SDL at Compilation stage
To use SDL, the database may need to be compiled with some options. Here is an example of compilation options used for a SDL program with four sdl instances.
compilerOption -add {sdlInstances 4}
compilerOption -add{sdlDisplayWidth 1222}
compilerOption -add {sdlTraceDepth 4M}

2. Use SDL and direct output of SDL program to a file. An example of SDL program is here.
sdl -setFile test.tdf
sdl -enable 
sdl -display  -console 0 /* Turn off console output */
sdl -display -file  test.log

I hit a situation that IO hang when running Palladium database and noticed a signal stays with a value without changing whenever IO hang. The signal represents a state in a state machine. This means the state machine somehow cannot progress. So it seems that the signal could be the clue why IO hang. And I need to find out what 
happened that caused the state machine hang. SDL seems to be a good choice to do this. Here is the SDL program
that I wrote to trigger and probe data(tracing). It is based on one example in the section of SDL Program Examples in Ref[1].

State One
{
    if (state_signal[38:0] == 'h0000080000) // wait until the specific state is entered 
    {
          load counter1 32000;
          goto Two;
    }
}

State Two
{
    if (counter1 <=0)    // if state not changed for 32000 FCLKs, state machine hang. So trigger at this time. 
        trigger;
    if (state_signal[38:0] != 'h0000080000)     //if state changed, no hang, start over again
        goto One;
}

Then I set the trigger position to 50% and a capture period of 320000 FCLKs, execute "run /nowait". This way I captured some data right before the state machine  to analyze why the state machine hang.


Reference
------------
1. UXE User Guide (Cadence), Chapter Controlling the Run with SDL. 

memory load and dump on palladium